期刊論文
| 學年 | 79 |
|---|---|
| 學期 | 2 |
| 出版（發表）日期 | 1991-07-01 |
| 作品名稱 | Synthesizing nested loop algorithms using nonlinear transformation method |
| 作品名稱（其他語言） | |
| 著者 | 張志勇; Chang, Chih-yung; Sheu, J.P. |
| 單位 | 淡江大學資訊工程學系 |
| 出版者 | Piscataway: Institute of Electrical and Electronics Engineers |
| 著錄名稱、卷期、頁數 | IEEE Transactions on Parallel and Distributed Systems 2(3), pp.304-317 |
| 摘要 | FOR-loops are the main source of parallelism in programs. A nonlinear transformation algorithm for parallelizing the execution of FOR-loop models is proposed. It is shown that by the mapping of nonlinear transformation, iterations of FOR-loops can be executed in a parallel form. The algorithm is useful in exploiting the parallelism of FOR-loops with one or more partitions on the innermost loop. Algorithms to partition and map the nested FOR-loops onto fixed size systolic arrays are discussed. Based on the time and space mapping schemes, all the iterations of FOR-loops can be correctly executed on the array processors in a parallel form |
| 關鍵字 | Data dependence; hyperplane method; nested For-loops; parallel processing; systolic arrays |
| 語言 | en |
| ISSN | 1045-9219 |
| 期刊性質 | 國外 |
| 收錄於 | SCI |
| 產學合作 | |
| 通訊作者 | |
| 審稿制度 | |
| 國別 | USA |
| 公開徵稿 | |
| 出版型式 | 電子版 |
| 相關連結 |
機構典藏連結 ( http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/59977 ) |